8051
AVR
EZLab
PIC
80C196KC
DSP
ARM
VHDL
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2. 196À» ¹è¿öº¸ÀÚ


I. 196ÀÇ ³»ºÎ ±¸Á¶

1. 196ÀÇ Æ¯Â¡

20MHz operation

RALU

488 byte internal RAM

28°³ interrupt source, 16°³ interrupt vector

1.4usÀÇ 16bit X 16bit multiplication (at 20MHz)

Power down mode, Idle mode

16bit watchdog timer

full duplex serial port

µ¿Àû ±¸Á¶ÀÇ 8bit/16bit external BUS width

Capture ±â´ÉÀÌ ÀÖ´Â 16bit up/down counter

8/10bit ADC with Sample/Hold

232 byte register file

Register-Register Architecture

PTS(Peripheral Transaction Server)

HOLD/HOLDA protocol

5°³ÀÇ 8bit I/O port

3 PWM output

³× °³ÀÇ 16bit software timer

2. 196ÀÇ ³»ºÎ ±¸Á¶

(1) 196KCÀÇ memory ±¸Á¶

196KCÀÇ memory mapÀ» »ìÆ캸¸é ´ÙÀ½°ú °°´Ù.

 

external Memory/IO

FFFFH ~ 4000H


internal ROM/EP-ROM or external ROM

3FFFH ~ 2080H


reserved



»óÀ§ 8°³ÀÇ interrupt vector table

203FH ~ 2030H


EP-ROM security key

202FH ~ 2020H


reserved



CCB(Chip Configuration Byte)

2018H


reserved



ÇÏÀ§ 8°³ÀÇ interrupt vector table

2013H ~ 2000H


port 3, 4

1FFFH

1FFEH

Address/Data BUS

external memory ¶Ç´Â IO

1FFDH ~ 0200H


internal data memory, register file(SP, RAM, SFR, external program code memory)

01FFH

~

0000H

80C196KC internal RAM & SFR

 

¿©±â¿¡¼­ ³»ºÎ RAM Áß Register file¿¡ ´ëÇØ °£´ÜÈ÷ ¾Ë¾Æº¸ÀÚ.

³»ºÎ RAMÀÇ memory map

 

ȗˤ RAM

01FFH ~ 0100H

window¸¦ ÀÌ¿ëÇÏ¿© Á÷Á¢ ¹øÁö ÁöÁ¤À¸·Î data access

Register File

00FFH ~ 001AH

direct, indirect, index addressing µîÀ» ÀÌ¿ëÇÏ¿© data access

SP(Stack Pointer)

0019H ~ 0018H

Stack Pointer·Î »ç¿ë

SFR(Special Function Register)

0017H ~ 0000H

I/O ¹× ´Ù¸¥ ÁÖº¯ ±â´ÉÀ» Á¦¾î

 

1) Register File

80196Àº Register FileÀ» base·Î ÇÏ¿© ¿¬»êÀ» ÇÏ´Â Register to Register Architecture·Î µÇ¾îÀÖ´Ù. register fileÀº 232byteÀÇ ³»ºÎ RAM(18H~0FFH)À» ¸ðµÎ register·Î »ç¿ëÇÒ ¼ö ÀÖÀ¸¸ç, 196KC¿¡´Â 256byteÀÇ Ãß°¡ RAMÀ» °¡Áö°í À־ ¼öÁ÷ window¸¦ ÀÌ¿ëÇÏ¿© »ç¿ëÇÒ ¼ö ÀÖ´Ù.

18H~0FFHÀÇ ¿µ¿ªÀ» register fileÀ̶ó°í ºÎ¸£´Âµ¥, ÀÌ ¿µ¿ªÀº byte(8bit), word(16bit), long word(32bit)·Î accessÇÒ ¼ö ÀÖ´Ù. ÀÌ register fileÀº RALU(Register/Arithmetic Logic Unit)°¡ »ç¿ëÇϹǷΠ232°³ÀÇ Accumulator°¡ ÀÖ´Â °Í°ú °°Àº È¿°ú¸¦ ³½´Ù. Áï, ƯÁ¤ Accumulator¸¦ ÀÌ¿ëÇÏ¿© ¿¬»êÀ» ÇÒ ÇÊ¿ä°¡ ¾øÀ¸¹Ç·Î ÇÁ·Î±×·¥¿¡ À¯¿ëÇÏ´Ù.

ÇÑÆí, »óÀ§ RAMÀº SFRÀÇ window¸¦ ÀÌ¿ëÇÏ¿© 0100H~01FFHÀÇ 256byteÀÇ RAMÀ» register file·Î mapping ½ÃÄѼ­ RALU¿¡¼­ »ç¿ëÇÒ ¼ö ÀÖ´Ù.

2) Stack Pointer

ÀÌ °÷Àº 16bit Stack Pointer·Î »ç¿ëµÇ´Â ºÎºÐÀÌ´Ù. »ç¿ëÀÚ°¡ Ãʱ⠼³Á¤ÇÏ¿© »ç¿ëÇÑ´Ù.

3) SFR(Special Function Registers) & ¼öÆò window

196ÀÇ IO¸¦ Á¦¾îÇϱâ À§ÇÑ RegisterÀÌ´Ù.SFRÀ» ¾Ë¾Æ¾ß¸¸ controller¿¡¼­ IO¸¦ ¸¶À½´ë·Î ÈÖ¾îÀâÀ» ¼ö ÀÖ´Ù.

¶Ç 196¿¡¼­´Â ¼öÆò window¸¦ ÀÌ¿ëÇÏ¿© ´Ù¸¥ ±â´ÉÀÇ SFRÀ» ¼±ÅÃÇÒ ¼ö°¡ ÀÖ´Ù. ¾Æ·¡ÀÇ Ç¥´Â 196ÀÇ SFRÀÌ´Ù.

 

address

¼öÆò window 0

Read

¼öÆò window 0

Write

¼öÆò window 1

Read/Write

¼öÆò window 15

Read

¼öÆò window 15

Write

17H

IOS2

PWMO_CONTROL

PWM2_CONTROL

PWM0_CONTROL

IOS2

16H

IOS1

IOC1

PWM1_CONTROL

IOC1

IOS1

15H

IOS0

IOC0

reserved

IOC0

IOS0

14H

WSR

WSR

WSR

WSR

WSR

13H

INT_MASK1

INT_MASK1

INT_MASK1

INT_MASK1

INT_MASK1

12H

INT_PEND1

INT_PEND1

INT_PEND1

INT_PEND1

INT_PEND1

11H

SP_STAT

SP_CON

reserved

SP_CON

SP_STAT

10H

PORT2

PORT2

reserved

reserved

reserved

0FH

PORT1

PORT1

reserved

reserved

reserved

0EH

PORT0

BAUD_RATE

reserved

reserved

reserved

0DH

TIMER2(HI)

TIMER2(HI)

reserved

T2CAPTURE(HI)

T2CAPTURE(HI)

0CH

TIMER2(LO)

TIMER1(LO)

IOC3

T2CAPTURE(LO)

T2CAPTURE(LO)

0BH

TIMER1(HI)

IOC2

reserved

IOC2

TIMER1(HI)

0AH

TIMER1(LO)

WATCHDOG

reserved

WATCHDOG

TIMER1(LO)

09H

INT_PEND

INT_PEND

INT_PEND

INT_PEND

INT_PEND

08H

INT_MASK

INT_MASK

INT_MASK

INT_MASK

INT_MASK

07H

SBUF(Rx)

SBUF(Tx)

PTSSRV(HI)

SBUF(Tx)

SBUF(Rx)

06H

HSI_STATUS

HSO_COMMAND

PTSSRV(LO)

HSO_COMMAND

HSI_STATUS

05H

HSI_TIME(HI)

HSO_TIME(HI)

PTSSEL(HI)

HSO_TIME(HI)

HSI_TIME(HI)

04H

HSI_TIME(LO)

HSO_TIME(LO)

PTSSEL(LO)

HSO_TIME(LO)

HSI_TIME(LO)

03H

AD_RESULT(HI)

HSI_MODE

AD_TIME

HSI_MODE

AD_RESULT(HI)

02H

AD_RESULT(LO)

AD_COMMAND

reserved

AD_COMMAND

AD_RESULT(LO)

01H

ZERO_REG(HI)

ZERO_REG(HI)

ZERO_REG(HI)

ZERO_REG(HI)

ZERO_REG(HI)

00H

ZERO_REG(LO)

ZERO_REG(LO)

ZERO_REG(LO)

ZERO_REG(LO)

ZERO_REG(LO)

 

* WSR (Window Select Register)À» ÀÌ¿ëÇؼ­ ¼öÆò window¸¦ ¼±ÅÃÇÏ´Â °æ¿ì

 

7

6

5

4

3

2

1

0

function

X

0

0

0

0

0

0

0

¼öÆò window 0

X

0

0

0

0

0

0

1

¼öÆò window 1

X

0

0

0

1

1

1

1

¼öÆò window 15

 

À§ÀÇ SFRµéÀ» º¸¸é °°Àº address¿¡ ¼­·Î ´Ù¸¥ ±â´ÉÀÇ Register°¡ mapping µÇ¾î Àִµ¥, ÀÌ´Â 96 °è¿­ controllerÀÇ ÀÌÀü ¹öÀü°úÀÇ È£È¯¼º ¶§¹®¿¡ Ãß°¡µÇ¸é¼­ ¹ß»ýÇÑ °ÍÀÌ´Ù. µû¶ó¼­ ƯÁ¤ register¸¦ ¼±ÅÃÇϱâ À§Çؼ­ WSRÀ» ÀÌ¿ëÇÏ¿© window¸¦ ¼±ÅÃÇÏ°í register¿¡ accessÇÏ´Â °ÍÀÌ´Ù. ¶Ç ÀÐ°í ¾²´Â °æ¿ì¿¡ µû¶ó¼­µµ accessµÇ´Â address°¡ ´Þ¶óÁö¹Ç·Î ÁÖÀÇÇØ¾ß ÇÑ´Ù. ÀÌ´Â °í±Þ »ç¿ëÀÚ¿¡°Ô ¸Å¿ì Áß¿äÇÏ´Ù. ÀÚÄ©ÇÏ¸é ½Ç¼ö¸¦ ãÀ» ¼ö ¾ø±â ¶§¹®ÀÌ´Ù.

(2) RALU

º¸Åë ¸¹Àº register°¡ ¾ø´Â CPU¿¡¼­´Â ¿¬»êÀ» À§Çؼ­ memory·ÎºÎÅÍ Accumulator·Î data¸¦ °¡Á®¿Í¾ß ÇÑ´Ù. ±×·¯³ª 196¿¡¼­´Â º¯¼ö°¡ ³»ºÎ RAM(register)¿¡ ÀÖÀ» °æ¿ì¿¡´Â ±×·² ÇÊ¿ä°¡ ¾ø´Ù. Áï, register°¡ accumulatorÀÇ ¿ªÇÒÀ» ÇÑ´Ù.

¿¹¸¦ µé¾î µ¡¼ÀÀ» ÇÏ´Â °æ¿ì º¸ÅëÀÇ CPU¿¡¼­´Â

MOV AX, 40H

MOV BX, 50H

ADD AX, BX

MOV 40H, AX

¶ó°í ÇؾßÇÏÁö¸¸, 196KC¿¡¼­´Â

ADD 40H, 50H

¶ó´Â ÇÑ ÁÙ·Î ³¡³ª°Ô µÈ´Ù. (40H¿Í 50H°¡ ³»ºÎ º¯¼ö¶ó¸é)

¶ÇÇÑ 196Àº µ¡¼À°ú »¬¼À, °ö¼À, ³í¸® ¿¬»ê ¸í·É¿¡ ¼¼ °³ÀÇ operand°¡ Àֱ⠶§¹®¿¡, ¿¹¸¦ µé¾î 60H=40H-50H(40HÀÇ ³»¿ë¿¡¼­ 50HÀÇ ³»¿ëÀ» »« ÈÄ 60H¿¡ ±× ³»¿ëÀ» ÀúÀåÇÑ´Ù.)ÀÇ °æ¿ì

SUB 60H, 40H, 50H

·Î ÇÑ ÁÙ¿¡ ³¡³¾ ¼ö°¡ ÀÖ´Ù. ÀÌ ¶§¹®¿¡ °°Àº ¼ÓµµÀÇ ´Ù¸¥ CPUº¸´Ù ¿¬»ê¼Óµµ°¡ µÎ ¼¼¹è »¡¶óÁö°í memory È¿À²Àº 10~30%Á¤µµ ÁÁ¾ÆÁú ¼ö ÀÖ´Ù.

II. 196 Assember

II-I. Assembler¸¦ ½ÃÀÛÇϱâ Àü¿¡

1. Assembler ±âÃÊ

¾î¼Àºí¸®¾î´Â ±âº»ÀûÀ¸·Î mnemonic + operand·Î ÇÑ ¸í·ÉÀÌ ±¸¼ºµÈ´Ù. ¿¹¸¦ µé¸é ´ÙÀ½°ú °°´Ù.

START: ADD AX, #40H

label mnemonic operands (AX´Â variable)

mnemonicÀ̶õ ¸í·ÉÀÇ Á¾·ù¸¦ ¸»ÇÏ´Â °ÍÀÌ°í, operand¶õ ¸í·É ½ÇÇàÀÇ ´ë»óÀÌ µÈ´Ù. ÀÌ·¸°Ô ¸¸µé¾îÁø ÇÑ ¸í·É ´ÜÀ§´Â Assembler¿¡ ÀÇÇؼ­ OP code·Î º¯È¯µÇ¾î object fileÀÌ ¸¸µé¾îÁø´Ù. ÀÌ´Â ´Ù½Ã ROMÀ̳ª RAM¿¡ µé¾î°¥ ¼ö ÀÖ´Â ½ÇÇà °¡´ÉÇÑ code(±â°è¾î)·Î º¯È¯µÇ¾î ½ÇÇàµÇ°Ô µÈ´Ù.

operand´Â mnemonic¿¡ µû¶ó ´Þ¶óÁø´Ù. µÎ °³ÀÎ °Íµµ ÀÖ°í, ÇÑ °³ÀÎ °Íµµ ÀÖ°í, ¾ø´Â °Íµµ ÀÖ´Ù. ¶ÇÇÑ À̵éÀº CPU¸¶´Ù ´Ù¸£´Ù. ±×·¯³ª ±× ±âº»ÀûÀÎ ±¸Á¶´Â ºñ½ÁÇϱ⠶§¹®¿¡ ÇÑ Á¾·ùÀÇ ¾î¼Àºí¸®¾î¸¦ ¾Ë°í ÀÖ´Ù¸é ´Ù¸¥ ¾î¼Àºí¸®¾î¸¦ ¹è¿ì±â´Â ±×¸® ¾î·ÆÁö ¾Ê´Ù.

ProgrammingÇÒ ¶§ Assembler¸¦ ¹Ýµå½Ã ¾²¶ó´Â ¹ýÀº ¾ø´Ù. C¸¦ ½áµµ µÇ°í C++À» ½áµµ »ó°ü¾ø´Ù. ±×·¯³ª Hardware¿¡ Á¢±ÙÇϱâ À§Çؼ­´Â Assembler´Â ÇʼöÀÌ°í, À̸¦ ¾Ë¾Æ¾ß¸¸ hardware¸¦ È¿À²ÀûÀ¸·Î »ç¿ëÇÒ ¼ö ÀÖ°í, ÃÖÀûÀÇ code¸¦ ¸¸µé ¼ö°¡ ÀÖ´Ù. ±×·¯¹Ç·Î ¼Óµµ¸¦ À§ÇÑ hardware¶ó¸é Cº¸´Ù´Â assembler°¡ ´õ ÁÁÀ» °ÍÀÌ´Ù.

ÇÑÆí °°Àº CPU¶óµµ ¿©·¯ Á¾·ùÀÇ assembler°¡ ÀÖÀ» ¼ö ÀÖ´Ù. ¹°·Ð ´ëºÎºÐÀº ºñ½ÁÇϳª ¾à°£¾¿ ´Ù¸¥ Á¡µµ ÀÖÀ¸¹Ç·Î ÀÚ½ÅÀÌ ¾î¶² assembler¸¦ »ç¿ëÇÏ´ÂÁö ¾Ë°í »ç¿ëÇØ¾ß ÇÑ´Ù. ¿¹¸¦ µé¾î 8x86°è¿­À̶ó¸é MASM(Macro Assembler)ÀÌ À¯¸íÇÒ °ÍÀÌ´Ù.

ÀÌÈĺÎÅÍ´Â intel¿¡¼­ Á¦°øÇÏ´Â asm96À» ÀÌ¿ëÇÏ¿© ¾î¼Àºí¸®¾î ÇÁ·Î±×·¥ °³¹ß°úÁ¤¿¡ »ìÆ캸°Ú´Ù. (196 assembler´Â http://www.postech.ac.kr/downarea/asm/ic96.zip ¿¡¼­ °¡Á®°¡±â ¹Ù¶÷.) ¾Æ·¡ ±×¸²Àº programÀÇ °³¹ß °úÁ¤ÀÌ´Ù. source programÀº ¾î¼Àºí¸®¾î¿¡ ÀÇÇؼ­ ¸¸µé¾îÁö°í ÀÌ´Â ¾î¼Àºí·¯¿¡ ÀÇÇØ AssembleµÈ´Ù. ¿©±â¼­ list fileÀ» ¾òÀ» ¼ö ÀÖ´Ù. ¿©±â¿¡¼­ ¸¸µé¾îÁø object fileÀº oh³ª hex2binµîÀ» ÅëÇؼ­ hex fileÀ̳ª bin fileµîÀÇ code·Î ¸¸µé¾îÁø´Ù.

                                        

2. 196 Assembler

¿ì¼± ÀϹÝÀûÀÎ »çÇ׵鿡 ´ëÇؼ­ »ìÆ캸ÀÚ.

(1) À̸§(Label, varible,...)À¸·Î »ç¿ëÇÒ ¼ö ÀÖ´Â ¹®ÀÚ

¸ðµç ASCII ¹®ÀÚ´Â »ç¿ë °¡´ÉÇÏ°í, ´ë¼Ò¹®ÀÚÀÇ ±¸ºÐÀº ¾ø´Ù. ±×·¯³ª À̸§¿¡¼­ ù ¹ø° ¹®Àڷδ 0~9ÀÇ ¼ýÀÚ¸¦ »ç¿ëÇÒ ¼ö ¾ø°í ´ÙÀ½ ¹®ÀÚ´Â Á¦ÇÑ ¾ø´Ù. ±æÀÌ´Â ÃÖ´ë 31¹®ÀÚÀÌ´Ù.

(2) ¼ýÀÚ Ç¥±â

 

Áø¼ö

Ãß°¡ »çÇ×

example

2 (binary)

B (b)

11000011B

8 (oxta)

O, Q (o, q)

145O

10 (decimal)

D, d ȤÀº ¾ø¾îµµ µÊ

95

16 (hexa)

H, h

9FH, 0F0H

 

16Áø¼öÀÇ °æ¿ì lableÀ̳ª À̸§°ú ¼ýÀÚ¸¦ ±¸º°Çϱâ À§Çؼ­ óÀ½¿¡ A~F·Î ½ÃÀÛÇÏ´Â °æ¿ì¿¡´Â ¾Õ¿¡ 0À» Çϳª ´õ ½áÁØ´Ù.

(3) ¹®Àå

À§¿¡¼­ ¼³¸íÇÑ °Í°ú °°´Ù.

LOOP: ORB TEMP, #'A' ; Temp¿¡ 'A'ÀÇ ASCII °ª ´õÇÔ

lable mnemoic operands comment

(4) Lable, Variable, Number

1) Lable

LableÀº jump³ª callÇÒ ¶§ÀÇ subroutime ȤÀº addressÀÇ À̸§À̸ç À§¿¡¼­Ã³·³ µÚ¿¡ ':'À» ºÙÀδÙ. ±×·¸Áö ¾ÊÀ¸¸é assembler´Â lableÀ» ±¸º°ÇÒ ¼ö ¾ø´Ù.

2) Variable

½ÇÁ¦ °ªÀÇ À§Ä¡¸¦ ³ªÅ¸³»±â À§ÇØ »ç¿ëÇÑ´Ù.

¿¹) TEMP: DCB 155

TEMP1: DSB 15

(C¿¡¼­ÀÇ º¯¼ö ¼±¾ð°ú °°À½ - int temp;)

3) Number

¼ýÀڷμ­ EQU(Equate)³ª SETÀ» »ç¿ëÇÏ¿© Á¤ÀÇÇÏ°í ¾´´Ù.

¿¹) RADIUS EQU 450

(C¿¡¼­ define°ú °°À½)

(5) Asm96 Áö½Ã¾î

 

Áö½Ã¾î

function

example

Module levelÀ» Á¤ÀÇÇÏ´Â Áö½Ã¾î

MODULE

module¿¡ ´ëÇÑ Á¤º¸ Á¦°ø

ABC MODULE STACKSIZE(100)

PUBLIC

public symbolÀ» Á¤ÀÇ

ACC

EXTRN

¿ÜºÎ ÂüÁ¶ symbolÀ» Á¤ÀÇ

ACD

END

end of program

END

Location counter¸¦ Á¤ÀÇÇÏ´Â Áö½Ã¾î

CSEG

code segment Á¤ÀÇ

CSEG AT 2080H

DSEG

data segment Á¤ÀÇ

DSEG AT 8000H

RSEG

overayµÇÁö ¾Ê´Â register segment Á¤ÀÇ

RSEG AT 0020H

OSEG

overayµÇ´Â register segment Á¤ÀÇ

OSEG AT 0100H

ORG

½ÃÀÛ address¸¦ Á¤ÀÇ(Origin)

ORG 8200H

SymbolÀ» Á¤ÀÇÇÏ´Â Áö½Ã¾î

EQU

symbol Á¤ÀÇ (ÀçÁ¤ÀÇ°¡ ºÒ°¡´É)(Equate)

ESC EQU 0

SET

symbol Á¤ÀÇ (ÀçÁ¤ÀÇ°¡ °¡´É)

BEEP SET 0¸ð

Code¸¦ Á¤ÀÇÇÏ´Â Áö½Ã¾î

DCB

º¯¼ö¸¦ byte·Î Á¤ÀÇ(Define Code in Byte)

DCB 33H, 'HI'

DCW

º¯¼ö¸¦ word·Î Á¤ÀÇ(Define Code in Word)

DCW 4444H

DCL

º¯¼ö¸¦ long word·Î Á¤ÀÇ(Define Code in Long word)

DCL 12345678H

DCR

º¯¼ö¸¦ ½Ç¼ö·Î Á¤ÀÇ(Define Code in real)

DCR 3.14159

Á¶°Ç ¾î¼Àºí¸® Áö½Ã¾î

IF

Á¶°Ç ¾î¼Àºí¸® ºí·° ½ÃÀÛ


ELSE0

Á¶°Ç ¾î¼Àºí¸® ºí·°À» ´ëü


ENDIF

Á¶°Ç ¾î¼Àºí¸® ³¡


 

196 ¾î¼Àºí·¯´Â ¸í·É(mnemonic)ÀÇ ±â´É¿¡ µû¶ó ¸î¸î ¸í·É±ºÀ¸·Î ³ª´©¾î º¼ ¼ö°¡ ÀÖ´Ù. ÀÌ¿¡ µû¶ó ³ª´©¾î º¸¸é ´ÙÀ½°ú °°´Ù.

µ¥ÀÌÅÍ Àü¼Û ¸í·É

»ê¼ú ¿¬»ê ¸í·É

³í¸® ¿¬»ê ¹× shift ¸í·É

branch ¸í·É

Stack°ú subroutine ¹× system Á¦¾î ¸í·É

¶Ç Bit, Byte, Word, Long word¿¡ µû¶ó ¸í·Éµµ ¾à°£¾¿ ´Þ¶óÁö¹Ç·Î ÁÖÀÇÇØ¾ß ÇÑ´Ù.

´ÙÀ½ ½Ã°£ºÎÅÍ´Â ÀÌ ¼ø¼­¿¡ µû¶ó ¾î¼Àºí¸®¾î¸¦ ¹è¿ìµµ·Ï ÇÏÀÚ.

´ÙÀ½Àº ¿¹Á¦ÀÌ´Ï Àо°í À§¿¡¼­ ¹è¿î °ÍµéÀ» Âü°íÇÏ¿© ºÐ¼®Çغ¸ÀÚ.

(¾ÕÂÊ »ý·«)

north equ 40h ; ¹æÇâÁ¤º¸

west equ 0

east equ 80h

south equ 0c0h

CSEG AT 8004H ; AD interrupt

ljmp AD_SERVICE

CSEG AT 800CH ; HSO interrupt

ljmp HSO_SERVICE

CSEG AT 8014H ; Software timer interrupt

ljmp SOFT_TIMER

;CSEG AT 801CH ; extint

; LJMP EXTI_SERVICE

CSEG AT 8030H ; Timer2 overflow interrupt

ljmp timer2_service

CSEG AT 8200H

START: LDB IOC0, #00000000B ; all hsi unit is disable, select P2.3, P2.5

LDB IOC1, #01111010B ; HSO4, HSO5 enable, select ACH7 as exint1 input,

; timer2 overflow interrupt enable

LDB IOC2, #10010100B ; Fast mode AD enable, timer2 normal increasing mode

LDB WSR, #1

LDB IOC3, #000000001B ; timer2 clock source internal

CLRB WSR

CLRB IOPORT1 ; port initialize

CLRB IOPORT2

ldb ax, #0ffh ; º® Á¤º¸ ÃʱâÈ­

clrb ch

clrdl: stb ch, data_location[ax]

djnzw ax, clrdl

EI

restart: ldb current_dir, #north ; set direction (forward, absolute)

ldb current_xy, #0 ; set current coordinate (x, y = 0, 0)

ldb target_xy, #44h ; set destination

(µÚÂÊ»ý·«)



 

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